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ASE and Cadence Deliver First System-in-Package EDA Solution Tailored for ASE’s High-Performance, Advanced IC Package Technologies

ASE INDUSTRIAL HOLDING CO LTD (ASX)  More Company Research Source: Business Wire
Last ase industrial holding co ltd earnings: 7/28 03:00 am Check Earnings Report
US:NYSE Investor Relations: aseglobal.com/en/ir
PDF Handles homogeneous and heterogeneous chip integration with high-density packaging to enhance the efficiency of chip and passive design optimization KAOHSIUNG, Taiwan & SAN JOSE, Calif.--(BUSINESS WIRE)-- Advanced Semiconductor Engineering, Inc. (ASE, TAIEX: 2311, NYSE: ASX), and Cadence Design Systems, Inc. (NASDAQ: CDNS), today announced they have collaborated to release a System-in-Package (SiP) EDA solution that addresses the challenges of designing and verifying Fan-Out Chip-on-Substrate (FOCoS) multi-die packages. The solution consists of the SiP-id™ (System-in-Package - intelligent design) design kit, an enhanced reference flow including IC packaging and verification tools from Cadence, and a new methodology that aggregates the requirements of wafer-, package- and system-level design into a unified and automated flow. By deploying the SiP-id™ methodology, designers can reduce design iterations and [Read more]

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