ASE and Cadence Deliver First System-in-Package EDA Solution Tailored for ASE’s High-Performance, Advanced IC Package Technologies
ASE Technology Holding Co., Ltd. American Depositary Shares (each representing Two Common Shares) (ASX)
Last ase technology holding co., ltd. american depositary shares (each representing two common shares) earnings: 2/7 01:00 am
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Source: Business Wire
Handles homogeneous and heterogeneous chip integration with high-density packaging to enhance the efficiency of chip and passive design optimization KAOHSIUNG, Taiwan & SAN JOSE, Calif.--(BUSINESS WIRE)-- Advanced Semiconductor Engineering, Inc. (ASE, TAIEX: 2311, NYSE: ASX), and Cadence Design Systems, Inc. (NASDAQ: CDNS), today announced they have collaborated to release a System-in-Package (SiP) EDA solution that addresses the challenges of designing and verifying Fan-Out Chip-on-Substrate (FOCoS) multi-die packages. The solution consists of the SiP-id™ (System-in-Package - intelligent design) design kit, an enhanced reference flow including IC packaging and verification tools from Cadence, and a new methodology that aggregates the requirements of wafer-, package- and system-level design into a unified and automated flow. By deploying the SiP-id™ methodology, designers can reduce design iterations and
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- [Latest] Global Advanced Packaging Market Size/Share Worth USD 94.4 Billion by 2032 at a 10.2% CAGR: Custom Market Insights (Analysis, Outlook, Leaders, Report, Trends, Forecast, Segmentation, Growth, Growth Rate, Value) [Yahoo! Finance]Latest
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